Events 2005

You are cordially invited to attend the

Jazz-cadence Tech Review

Please join Jazz Semiconductor executives for a Technology Review highlighting our new process offerings, design kit and modeling features to enable Advanced Analog Integration for next generation wireless, power management, high speed networking and data storage products.

At Cadence Design Systems
Where: 2655 Seely Avenue, Building 5, San Jose, California 95134
When: 9:00am to 2:00pm, Tuesday, March 7, 2006
Complimentary Breakfast, Lunch & Refreshments will be served

AGENDA
Jazz Semiconductor Overview
• Jazz Business Overview
• The Analog Foundry Model
• Enabling Analog Integration
• Aligning Technology with End Markets
– RFCMOS/SiGe BiCMOS
– HVCMOS and BCD
Analog, High Voltage and RF Modeling
• The Importance of Modeling in Analog and RF
• Jazz Modeling Infrastructure
• New Features/Enhancements
Design Kits for Specialty Foundries
• Jazz Design Kit Infrastructure
• Jazz/Cadence PDKs
• Design Kit Training and Demo
• New Features/Enhancements
Question and Answer Panel
Designing Analog SoCs



Jazz/Cadence Technology Review Online Registration Form
Full Name Company Name
Address Telephone
Email


For more information, please contact:

Melinda Jarrell
Phone 949/435-8181
melinda.jarrell@jazzsemi.com

or

Jessica McNaughton
Phone 949/435-8086
jessica.mcnaughton@jazzsemi.com

 

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